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File:KL Intel P8085AH.jpg|
An Intel 8085AH processor.
|Produced||From 1977 to 1990s|
|Max. CPU clock rate||3, 5 and 6 MHz|
|Min. feature size||3 μm|
The Intel 8085 ("eighty-eighty-five") is an 8-bit microprocessor introduced by Intel in 1977. It is backward binary compatible with the more-famous Intel 8080 (only adding a few minor instructions) but required less supporting hardware, thus allowing simpler and less expensive microcomputer systems to be built.
The "5" in the model number came from the fact that the 8085 requires only a +5-Volt (V) power supply by using depletion mode transistors, rather than requiring the +5 V, −5 V and +12 V supplies the 8080 needed. This is similar to the competing Z80 (also 8080-derived) introduced the year before. These processors were sometimes used in computers running the CP/M operating system.
The Intel 8085 requires at least an external ROM and RAM along with an 8 bit address latch. The Intel 8755 contains the address latch, 2Kx8 EPROM and 2x8 programmable I/O. In addition to the address latch, the Intel 8155 contains 256-bytes of aRAM and 22 programmable I/O signals and a 14 bit programmable Timer/Counter) so cannot technically be called a microcontroller.This microprocessor has a 16 bit address bus and an 8 bit data bus.
Both designs (8080/8085) were eclipsed for desktop computers by the compatible Zilog Z80, which took over most of the CP/M computer market as well as taking a share of the booming home computer market in the early-to-mid-1980s.
The 8085 had a long life as a controller. Once designed into such products as the DECtape controller and the VT102 video terminal in the late 1970s, it served for new production throughout the life span of those products (generally longer than the product life of desktop computers).
The 8085 is a conventional von Neumann design based on the Intel 8080. Unlike the 8080 it does not multiplex state signals onto the data bus, but the 8-bit data bus is instead multiplexed with the lower part of the 16-bit address bus to limit the number of pins to 40. Pin No. 40 is used for the power supply (+5 V) and pin No. 20 for ground. Pin No. 39 is used as the hold pin. Pins No. 15 to No. 8 are generally used for address buses. The processor was designed using nMOS circuitry and the later "H" versions were implemented in Intel's enhanced nMOS process called HMOS, originally developed for fast static RAM products. Only a 5 volt supply is needed, like competing processors and unlike the 8080. The 8085 uses approximately 6,500 transistors.
The 8085 incorporates the functions of the 8224 (clock generator) and the 8228 (system controller), increasing the level of integration. A downside compared to similar contemporary designs (such as the Z80) is the fact that the buses required demultiplexing; however, address latches in the Intel 8155, 8355, and 8755 memory chips allowed a direct interface, so an 8085 along with these chips is almost a complete system.
The 8085 has extensions to support new interrupts, with three maskable vectored interrupts (RST 7.5, RST 6.5 and RST 5.5), one non-maskable interrupt (TRAP), and one externally serviced interrupt (INTR). The RST n.5 interrupts refer to actual pins on the processor, a feature which permitted simple systems to avoid the cost of a separate interrupt controller. Interrupts are enabled by the EI instruction and disabled by the DI instruction.
Like the 8080, the 8085 can accommodate slower memories through externally generated wait states (pin 35, READY), and has provisions for Direct Memory Access (DMA) using HOLD and HLDA signals (pins 39 and 38). An improvement over the 8080 is that the 8085 can itself drive a piezoelectric crystal directly connected to it, and a built in clock generator generates the internal high amplitude two-phase clock signals at half the crystal frequency (a 6.14 MHz crystal would yield a 3.07 MHz clock, for instance).
|Intel 8085 registers|
The processor has seven 8-bit registers accessible to the programmer, named A, B, C, D, E, H, and L, where A is the 8-bit accumulator and the other six can be used as independent byte-registers or as three 16-bit register pairs, BC, DE, and HL, depending on the particular instruction. Some instructions use HL as a (limited) 16-bit accumulator. As in the 8080, the contents of the memory address pointed to by HL could be accessed as pseudo register M. It also has a 16-bit program counter and a 16-bit stack pointer to memory (replacing the 8008's internal stack). Instructions such as PUSH PSW, POP PSW affected the Program Status Word (accumulator and flags). The accumulator stores the results of arithmetic and logical operations, and the flags register bits (sign, zero, auxiliary carry, parity, and carry flags) are set or cleared according to the results of these operations.
As in many other 8-bit processors, all instructions are encoded in a single byte (including register-numbers, but excluding immediate data), for simplicity. Some of them are followed by one or two bytes of data, which could be an immediate operand, a memory address, or a port number. A NOP "no operation" instruction exists, but does not modify any of the registers or flags. Like larger processors, it has CALL and RET instructions for multi-level procedure calls and returns (which can be conditionally executed, like jumps) and instructions to save and restore any 16-bit register-pair on the machine stack. There are also eight one-byte call instructions (RST) for subroutines located at the fixed addresses 00h, 08h, 10h,...,38h. These are intended to be supplied by external hardware in order to invoke a corresponding interrupt-service routine, but are also often employed as fast system calls. The most sophisticated command is XTHL, which is used for exchanging the register pair HL with the value stored at the address indicated by the stack pointer.
Most 8-bit operations work on the 8-bit accumulator (the A register). For two operand 8-bit operations, the other operand can be either an immediate value, another 8-bit register, or a memory cell addressed by the 16-bit register pair HL. Direct copying is supported between any two 8-bit registers and between any 8-bit register and a HL-addressed memory cell. Due to the regular encoding of the MOV-instruction (using a quarter of available opcode space) there are redundant codes to copy a register into itself (MOV B,B, for instance), which are of little use, except for delays. However, what would have been a copy from the HL-addressed cell into itself (i.e., MOV M,M) instead encodes the HLT instruction, halting execution until an external reset or interrupt occurred (providing interrupts are enabled).
Although the 8085 is an 8-bit processor, it has some 16-bit operations. Any of the three 16-bit register pairs (BC, DE, HL or SP) could be loaded with an immediate 16-bit value (using LXI), incremented or decremented (using INX and DCX), or added to HL (using DAD). LHLD loaded HL from directly-addressed memory and SHLD stored HL likewise. The XCHG operation exchanges the values of HL and DE. Adding HL to itself performs a 16-bit arithmetical left shift with one instruction. The only 16 bit instruction that affects any flag is DAD (adding HL to BC, DE, HL or SP), which updates the carry flag to facilitate 24-bit or larger additions and left shifts (for a floating point mantissa for instance). Adding the stack pointer to HL is useful for indexing variables in (recursive) stack frames. A stack frame can be allocated using DAD SP and SPHL, and a branch to a computed pointer can be done with PCHL. These abilities make it feasible to compile languages such as PL/M, Pascal, or C with 16-bit variables and produce 8085 machine code.
Subtraction and bitwise logical operations on 16 bits is done in 8-bit steps. Operations that have to be implemented by program code (subroutine libraries) included comparisons of signed integers as well as multiply and divide.
The 8085 supported up to 256 input/output (I/O) ports, accessed via dedicated Input/Output instructions—taking port addresses as operands. This I/O mapping scheme is regarded as an advantage, as it frees up the processor's limited address space. The IN and OUT instructions are used to read and write I/O port data.
Memory mapped I/O devices can also be accessed by using the LDA addr(load acccumulator from the 16 bit address) and the STA addr(store acccumulator at the 16 bit address specified).
Intel produced a series of development systems for the 8080 and 8085, known as the MDS-80 Microprocessor System. The original development system had an 8080 processor. Later 8085 and 8086 support was added including ICE (in-circuit emulators). It is a large and heavy desktop box, about a 20" cube (in the Intel corporate blue color) which included a CPU, monitor, and a single 8 inch floppy disk drive. Later an external box was available with two more floppy drives. It runs the ISIS operating system and can also operate an emulator pod and an external EPROM programmer. This unit uses the Multibus card cage which was intended just for the development system. A surprising number of spare card cages and processors were being sold, leading to the development of the Multibus as a separate product.
The later iPDS is a portable unit, about 8" x 16" x 20", with a handle. It has a small green screen, a keyboard built into the top, a 5¼ inch floppy disk drive, and ran the ISIS-II operating system. It can also accept a second 8085 processor, allowing a limited form of multi-processor operation where both processors run simultaneously and independently. The screen and keyboard can be switched between them, allowing programs to be assembled on one processor (large programs took awhile) while files are edited in the other. It has a bubble memory option and various programming modules, including EPROM and Intel 8048 and 8051 programming modules which are plugged into the side, replacing stand-alone device programmers. In addition to an 8080/8085 assembler, Intel produced a number of compilers including PL/M-80 and Pascal languages, and a set of tools for linking and statically locating programs to enable them to be burnt into EPROMs and used in embedded systems.
A lower cost SDK-85 System Design Kit board contains an 8085 CPU, 8355 ROM containing a debugging monitor program, 8155 RAM and 22 I/O, 8279 hex keypad and 8-digit 7-segment LED, TTY (Teletype) 20 mA current loop serial interface. Pads were available for one more 2Kx8 8755 EPROM and another 256 byte RAM 8155 I/O Timer/Counter could be optionally added. All data, control and address signals are available on dual pin headers and a large prototype area is provided.
For the extensive use of 8085 in various applications, the microprocessor is provided with an instruction set which consists of various instructions such as MOV, ADD, SUB, JMP, etc. These instructions are written in the form of a program which is used to perform various operations such as branching, addition, subtraction, bitwise logical and bit shift operations. More complex operations and other arithmetic operations must be implemented in software. For example, multiplication is implemented using a multiplication algorithm.
The 8085 processor is used in a few early personal computers, for example, the TRS-80 Model 100 line used an OKI manufactured 80C85 (MSM80C85ARS). The CMOS version 80C85 of the NMOS/HMOS 8085 processor has several manufacturers. Some manufacturers provide variants with additional functions such as additional instructions. The rad-hard version of the 8085 has been in on-board instrument data processors for several NASA and ESA space physics missions in the 1990s and early 2000s, including CRRES, Polar, FAST, Cluster, HESSI, the Sojourner Mars Rover, and THEMIS. The Swiss company SAIA used the 8085 and the 8085-2 as the CPUs of their PCA1 line of programmable logic controllers during the 1980s.
Pro-Log Corp. put the 8085 and supporting hardware on an STD Bus format card containing CPU, RAM, sockets for ROM/EPROM, I/O and external bus interfaces. The included Instruction Set Reference Card uses entirely different mnemonics for the Intel 8085 CPU, as the product was a direct competitor to Intel's Multibus card offerings.
The 8085 CPU is one part of a family of chips developed by Intel, for building a complete system. Many of these support chips were also used with other processors. The original IBM PC based on the Intel 8088 processor used several of these chips; the equivalent functions today are provided by VLSI chips, namely the "Southbridge" chips.
- 8155-RAM+ 3 I/O Ports+Timer
- 8156-RAM+ 3 I/O Ports+Timer
- 8355-16,384-bit (2048 ×8) ROM with I/O
- 8604-4096-bit (512 ×8) PROM
- 8755-EPROM+2 I/O Ports
- 8202-Dynamic RAM Controller
- 8203-Dynamic RAM Controller
- 8205-1 Of 8 Binary Decoder
- 8206-Error Detection & Correction Unit
- 8207-DRAM Controller
- 8210-TTL To MOS Shifter & High Voltage Clock Driver
- 8212-8-bit I/O Port
- 8216-4-bit Parallel Bidirectional Bus Driver
- 8218/8219-Bus Controller
- 8226-4-bit Parallel Bidirectional Bus Driver
- 8231-Arithmetic Processing Unit
- 8232-Floating Point Processor
- 8237-DMA Controller
- 8251-Communication Controller
- 8253-Programmable Interval Timer
- 8254-Programmable Interval Timer
- 8255-Programmable Peripheral Interface
- 8256-Multifunction Support Controller
- 8257-DMA Controller
- 8259-Programmable Interrupt Controller
- 8271-Programmable Floppy Disk Controller
- 8272-Single/Double Density Floppy Disk Controller
- 8273-Programmable HDLC/SDLC Protocol Controller
- 8274-Multi-Protocol Serial Controller
- 8275-CRT Controller
- 8276-Small System CRT Controller
- 8275-Programmable Key Board Interface
- 8279-Key Board/Display Controller
- 8282-8-bit Non-Inverting Latch with Output Buffer
- 8283-8-bit Inverting Latch with Output Buffer
- 8291-GPIB Talker/Listener
- 8293-GPIB Transceiver
- 8294-Data Encryption/Decryption Unit+1 O/P Port
- 8295-Dot Matrix Printer Controller
In many engineering schools the 8085 processor is used in introductory microprocessor courses. Trainer kits composed of a printed circuit board, 8085, and supporting hardware are offered by various companies. These kits usually include complete documentation allowing a student to go from solder to assembly language programming in a single course. Also the architecture of this and the associated instruction set is easy for a student to understand.
Some of the simulators available for the 8085 microprocessor are listed below:
- GNUSim8085 - It consists of a simulator, assembler and a debugger. It is available for both Windows and Linux operating systems.
- Win85 - Open source (under the MIT license) simulator/debugger for Windows
- 8085 simulator - It includes a simulated keypad, an assembler and a simulator.
- Intel 8085 Simulator for Android.
- ENVI85 - It was written by professors Stefan Fedyschyn and Edwin Kay. This and the above simulator are provided on the CD that accompanies the book, Microprocessor Architecture, Programming and Applications with the 8085 by Ramesh Gaonkar.
- Jubin Mitra's 8085 Simulator - Available for download from various sites. Supports many assembler directives.
- GNUSim8085 – An open source multi-platform simulator software for the 8085 processor.
- IBM System/23 Datamaster gave IBM designers familiarity with the 8085 support chips used in the IBM PC≈
- William Stallings Computer Organization and Architecture: Designing for Performance 8th Ed. Prentice Hall, 2009 ISBN 0-13-607373-5
- Abhishek Yadav Microprocessor 8085, 8086 Firewall Media, 2008 ISBN 81-318-0356-2
- Ramesh Gaonkar Microprocessor Architecture, Programming and Applications with the 8085 Penram International Publishing ISBN 81-87972-09-2
- Bill Detwiler Tandy TRS-80 Model 100 Teardown Tech Republic, 2011 Web